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Integration Time

Clamp

Sample

A/D clk

LINE*

PIX*

FRAME*

64 t

t = 1/system clock (Default Setting = 200ns)

64 t64 t

50t

12t

140t

25t

222t

Figure 5: Line Rate Timing for KAF-0261E, 0402E, 1001E, 1301E, 1402E,

Note: The line rate timing for the KAF-4301E is similar to this with the addition of an overlap period in the vertical clock

timing. Consult the current specification for the KAF-4301E for details.

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MTD PS Specifiche Pagina 27